Hi With a sputterer we could just sputter the silicon for forming the gates... What do you think?
Cheers -lev
On Saturday, February 5, 2022 3:48:57 PM WET David Lanzendörfer wrote:
Hi We already have been looking at Sam's process flow a while ago and already noticed that he's "cheating", by using specialized wafers. However. My goal is to develop a full stack manufacturing process, without skipping essential parts. I rather wanna find alternative chemical recipes for growing poly and oxide which do not require military-grade poisonous gases :-)
Cheers -lev
On Saturday, February 5, 2022 3:34:52 PM WET Martin Geisse wrote:
Hi,
I just found something in Sam Zeloof's latest design (08/2021) that I overlooked first and I'm not sure if it has been discussed here yet... He uses wafers which are pre-doped for p-wells, and gate oxide and polysilicon pre-applied without any mask. He then patterns, etches and n-dopes source/drain regions, using the poly as a mask and then adds "hard-baked photoresist as a dielectric" to separate the poly gate from the above metal layer. This requires some changes in the process and will only allow n-type transistors, but he completely avoids the problems with poly deposition AND doesn't have to grow field oxide -- so I'm actually not sure if he needs a high-temp furnace at all.
Link: top article on http://sam.zeloof.xyz/category/semiconductor/
Opinions?
Greetings, Martin
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