David Lanzendörfer schreef op zo 04-03-2018 om 00:39 [+0800]:

Hi
Should I diffuse the p-well instead of just ion implanting it?
It will take another 12 hours, but the on-resistance would be much lower, 
which will give less losses in the device.

General comment is that resistance is not about power efficiency. Power efficiency is in CMOS related to the capacitances that are charged and uncharged (e.g. P = C.f.V^2/2). The resistance determines how fast you can go.

Too high well resistance increases the risk for latch-up problems though.

greets,

Staf.