Hagen SANKOWSKI schreef op di 13-03-2018 om 10:44 [+0100]:

With 0.5 um only we are already in the 3.3 Volt domain, 5 Volt is to
high for this small gates.

I am using 0.35um TSMC here with 3.3V core and 5V IO. The minimum L for the 3.3V NMOS & PMOS is 0.35um and 0.5um for the 5V NMOS & PMOS.

greets,

Staf.