David Lanzendörfer schreef op za 10-03-2018 om 01:35 [+0800]:

Can you folks think of any more test structures for the test-section besides 
plain NMOS/PMOS and different caps and resistors using all the different 
layers?

A good exercise is to make the design rules chapter concrete with real values in them. For each of the rules determine what actually is the cause of this design rule (litho, etch, physics, ...) and then think about test structures to check if you meet the design rule in practice.

greets,

Staf.