[Libre-silicon-devel] Wafertest structures - Overlay

Hello.

I just grep my folder with essential notes I collected over the years and stumbled across the Overlay problem [1] and [2].

Do we need dedicated structures on the Test-Wafer for that? Just for curiosity how good the machines are and our handling is??

Regards, Hagen

[1] https://de.wikipedia.org/wiki/Overlay_(Halbleitertechnik) [2] https://en.wikipedia.org/wiki/Overlay_control

Btw, the German Wikipedia Article is better than the English one in this case.