Hi What I mean by this is the issue with graininess when you start doping the thing: http://www.iue.tuwien.ac.at/phd/puchner/node33.html Which will limit us in the sense that we can not reduce the ohmic resistance further and further. We will always be "worse in resistance" compared to an Aluminum gate. Also with Salicides we loos the advantage of the "builtin" +4.1V for the threshold voltages, we get from the Aluminum.
But the benefits in construction seem to outweight the ohmic disadvantages and the threshold issues, because the alignment problem will fall away.
What do you all think? Should we choose salicide structures like this one over Aluminum? https://www.silvaco.com/products/vwf/athena/ss4/ss4_fig18w.jpg
Or for the vote: gate-first or gate-last approach What do you vote for?
Cheers David
On Wednesday, 7 March 2018 5:07:35 AM HKT Staf Verhaegen wrote:
David, Could you summarize again what the problem is with poly gate?In the industry polysilicon has been the gate for all technologies I know from 1um up to at least 65nm. greets,Staf.
David Lanzendörfer schreef op wo 07-03-2018 om 04:55 [+0800]:
Hi In the book "ULSI Process Integration 5" I've found some detailed description of the usage of dummy-gates for gate-last manufacturing.
https://books.google.com.hk/books? id=o3zXAiskEYUC&lpg=PA319&ots=sD2_WDEV6A&dq=gate-last%20cmos%20dummy- gate&pg=PA319#v=onepage&q=gate-last%20cmos%20dummy-gate&f=false
There are also pros and cons listed for gate-last vs. gate-first
What do you folks think? What's the smarter choice?
Cheers
On Tuesday, 6 March 2018 10:14:05 PM HKT David Lanzendörfer wrote:
Hi
How do you want to handle that later with smaller nodes?
For that it would be interesting to have access to the full IEEE document here: http://ieeexplore.ieee.org/document/5984621 They apparently made it work.
I think they all have the problem of aligning gates, isn't it?
This document thematizes that very well. http://electroiq.com/blog/2010/03/integrating-high-k
Gate-first-gate-last problem, is exactly what we have here right now. If we use poly for the gate first we will have a problem with grainyness but if we do gate-last with Aluminum we will have a alignement issue.
Or that method for Aluminum: http://km2000.us/franklinduan/articles/images/high_k88.jpg
We can use a dummy gate and then use the damazene method to add the actual Aluminum gate electrode. I'm actually eager to go for this, because poly silicon is very grainy as I've explained to George today over some beers. It will be a problem to have exact geometric structures with 28nm when using poly for the gate electrode. Also we loose the "4.1 volt advantage" when it comes to threshold drops. (E_Al = V_M*q = 4.1 eV -> V_M = 4.1V)
Cheers
David
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