Re: [Libre-silicon-devel] Announcement - Mumble session on Sunday 2021-07-18 @ 18:00 UTC

Hi, What about "outsourcing" the memory controller over HyperRam? If we can do HyperRam, we could have a controller that translates HyperRam to DDR2/DDR3? Our CPU <-> HyperRam <-> Controller <-> DDR2/3 <-> DRAM chips Just an idea... Best regards, Philipp Gühring