6 Mar
2018
6 Mar
'18
9:47 a.m.
How do you want to handle that later with smaller nodes? I think they all have the problem of aligning gates, isn't it?
On 03/06/2018 10:33 AM, David Lanzendörfer wrote:
Hi folks Going through the process over and over again I have to appreciate Stafs input on the gate alignment. Already with 1um it's very difficult to get a proper alignment of the overlap of the drain/source and the gate. Maybe we should consider poly silicon after all? (It won't affect the layout)
Cheers David
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