Hello David.
What is the current status of this Release Candidate?
I looked at the changed magic-files and there again all pathes broken.. Do I have a chance to fix it before shipping??
Best Regards, Hagen.
On 11/19/18 9:05 PM, Éger Ferenc wrote:
Hello David, I reviewed the layout and there is an error in magic. In the cell L500_NMOSi_W3_L3_params, there is a "hole" in nwell and pbase between the FET and the edge of the source contact. I corrected it and pushed it to my repo. Please pull and re-generate the GDSII. Regards, Ferenc
On Mon, Nov 19, 2018 at 3:13 PM David Lanzendörfer <david.lanzendoerfer@o2s.ch mailto:david.lanzendoerfer@o2s.ch> wrote:
Hi all After yesterdays Mumble session I've now added the missing structures Ferenc has pointed out. Please everyone look over the GDS2 file, if no more mistakes have occured I'd say we can go and order it. https://github.com/libresilicon/PearlRiver/blob/master/Layout/gds/PearlRiver_die.gds Cheers David
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