Hi List, Hi Hagen

Hagen and I had a discussion yesterday about the mechanics of our bonding pads and how physical stress when putting a probe onto the pad as well as bonding might impact the crystal. I've found this interesting IEEE approved paper on this topic[1]. Conlusion from this paper is: We can just make the top metal layer a big square and all the lower metal layers patterned with the cifoutput square expression. And it doesn't really matter with the frequencies as much as Hagen was afraid it would apparently, because they explicitly state these pattern shapes are also suitable for higher frequencies. One could even build the ESD circuit directly under the bonding pad and the chip would still perform.

I'm looking forward to hearing from you, what you folks are thinking.

Cheers David

[1] http://www.ics.ee.nctu.edu.tw/~mdker/Referred%20Journal%20Papers/27tcapt03-k...