[Libre-silicon-devel] ADC for Northpoint // interesting paper by colone chip

ludwig jaffe ludwig.jaffe at gmail.com
Tue Feb 26 04:42:07 CET 2019

There is also an interesting paper by coligne chip to the topic


There is a trick to get an adc from a differential pair input (lvds) by
connecting the single ended output of a gpo to a resistor and having a
capacitor at the other end of the resistor connected to gnd on its other
side while the connection of r.and c is fed to one input of the lvds pair
and the other input senses the voltage and is the adc input.
The gpo is controlled by a delta sigma modulator.
The rc generates a comparision voltage for the lvds to flip high or low
depending on the change of the input voltage.
It is like balancing a broom in your hand.😃

See here

Lattice has also a paper on the trick.

And see here an original paper cite
Taking advantage of LVDS input buffers to implement sigma-delta A/D
converters in FPGAs

Fabio Sousa, Volker Mauer, +2 authors Volnei A. Pedroni
Published in IEEE International Symposium on Circuits and… 2004

This paper describes the implementation of a sigma-delta (/spl Sigma//spl
Delta/) A/D converter within an FPGA, with minimal use of external analog
components. The approach takes advantage of existing low-voltage
differential signalling (LVDS) I/O pads; this allows the implementation of
low-cost ADCs into existent FPGAs, even though such digital devices do not
possess analog interfacing capabilities at first. The converter was
implemented in an actual FPGA and had its performance evaluated.

On February 25, 2019 5:45:22 PM GMT+01:00, "David Lanzendörfer" <
david.lanzendoerfer at o2s.ch> wrote:
> Hi
>> 130nm is the point at which DDR3 can reach 400mhz.  that's actually
> We're working on one micron right now...
> Yes! Of course! As soon as we've going submicron, DDR3 becomes a topic.
> Especially because we need DRAM for our  SoCs and CPUs
> Cheers
>     David

Send from mobile phone with autocorrection / autofill. Blame my phone for
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