[Libre-silicon-devel] ADC for Northpoint Trick use lvds minus input and rc filter driven by gpo

Ludwig Jaffe ludwig.jaffe at gmail.com
Tue Feb 26 04:52:00 CET 2019


See a paper by colognechip on a similar topic

 http://www.colognechip.com/asic/ip-cores/c3-codec-presentation_socip.pdf 



On February 26, 2019 4:33:36 AM GMT+01:00, Ludwig Jaffe <ludwig.jaffe at gmail.com> wrote:
>There is a trick to get an adc from a differential pair input (lvds) by
>connecting the single ended output of a gpo to a resistor and having a
>capacitor at the other end of the resistor connected to gnd on its
>other side while the connection of r.and c is fed to one input of the
>lvds pair and the other input senses the voltage and is the adc input.
>The gpo is controlled by a delta sigma modulator.
>The rc generates a comparision voltage for the lvds to flip high or low
>depending on the change of the input voltage.
>It is like balancing a broom in your hand.😃
>
>See here
>https://www.eetimes.com/document.asp?doc_id=1278518
>
>Lattice has also a paper on the trick just find it. It is toobig for
>the list...
>
>And see here an original paper cite
>Title:
>Taking advantage of LVDS input buffers to implement sigma-delta A/D
>converters in FPGAs
>
>    Fabio Sousa, Volker Mauer, +2 authors Volnei A. Pedroni
>    Published in IEEE International Symposium on Circuits and… 2004
>    DOI:10.1109/ISCAS.2004.1328388
>
>This paper describes the implementation of a sigma-delta (/spl
>Sigma//spl Delta/) A/D converter within an FPGA, with minimal use of
>external analog components. The approach takes advantage of existing
>low-voltage differential signalling (LVDS) I/O pads; this allows the
>implementation of low-cost ADCs into existent FPGAs, even though such
>digital devices do not possess analog interfacing capabilities at
>first. The converter was implemented in an actual FPGA and had its
>performance evaluated. 
>
>https://ieeexplore.ieee.org/document/1328388
>
>
>
>
>
>
>
>On February 25, 2019 5:45:22 PM GMT+01:00, "David Lanzendörfer"
><david.lanzendoerfer at o2s.ch> wrote:
>>Hi
>>
>>>  130nm is the point at which DDR3 can reach 400mhz.  that's actually
>>viable.
>>We're working on one micron right now...
>>
>>Yes! Of course! As soon as we've going submicron, DDR3 becomes a
>topic.
>>Especially because we need DRAM for our  SoCs and CPUs
>>
>>Cheers
>>    David
>
>-- 
>Sent from my Android device with K-9 Mail. Please excuse my brevity.

-- 
Sent from my Android device with K-9 Mail. Please excuse my brevity.
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