[Libre-silicon-devel] KiCAD VLSI design

David Lanzendörfer david.lanzendoerfer at o2s.ch
Sun Jan 20 16:44:04 CET 2019

It's more for the purpose of designing analog IP cores which require manual 
"finesse" when being placed and routed.
The actual place and route of the SoCs and MCUs will of course be done 
automatically using the nice place&route tool from Andreas.


> Also, again, the ability to recursively include PCB (or library parts)
> within PCBs aka Cells.
> I did not reply earlier, the reason for this is firstly a full cell may have
> already been done (manual or auto routing) saving time and CPU , secondly,
> certain layouts may simply be far too complex or regular and may need to be
> generated either programmatically or by having blocks that the autorouter
> is permitted to place and route but not alter, thus saving time and also
> making the design easier to verify.
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 195 bytes
Desc: This is a digitally signed message part.
URL: <http://list.libresilicon.com/pipermail/libre-silicon-devel/attachments/20190120/e20c244a/attachment.sig>

More information about the Libre-silicon-devel mailing list