[Libre-silicon-devel] Analog Try-out "triple-5"

Christoph Maier christoph.maier at ieee.org
Mon Mar 4 05:15:51 CET 2019


On Sun, Mar 3, 2019 at 8:08 PM ludwig jaffe <ludwig.jaffe at gmail.com> wrote:
>
> Hi Hagen,
> we could make a combo chip:
[...]
> What do you think?

WAY too ambitious.
The [7]555/6 is a well-known standard design,
so it's mostly a proof-of-concept for the tool chain used.

It's an excellent idea to start with small steps.

What tool chain does Ferenc want to use, anyhow?

tatzelbrumm <- hanging out in Gert's institute for another week

> Cheers,
>
> Ludwig
>
>
>
> On Sun, Mar 3, 2019 at 2:13 PM Hagen SANKOWSKI <hsank at posteo.de> wrote:
>>
>> Hello List.
>>
>> Today in our weekly Mumble Session we talked about a smaller chip, which
>> could be realized before the Northpoint.
>>
>> Well, we came across the well-known "triple-5 chip". The original NE555
>> [0] was developed by the Swiss electronics engineer Hans Camenzind [1]
>> and get cloned by nearly all silicon firms on the market in this era.
>> Great starting points for our CMOS-based clone are the wikipedia site
>> and the free eBook [2] of the original author. I strongly recommend
>> everybody to read this great book!


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