[Libre-silicon-devel] Silicide formation
david.lanzendoerfer at lanceville.cn
Thu Mar 7 13:44:20 CET 2019
Today we've prepared the wafer for the RTP steps we're going to perform.
If successful it will reduce the resistance of the polysilicon from a few
Mega-Ohm to a few 100 Ohm per square.
This is a required step on our way to provide FETs with a threshold voltage of
I'll update you tomorrow and we will discuss the results on Sunday.
Wish Victor and me luck tomorrow!
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