[Libre-silicon-devel] Analog design toolchain for 555
christoph.maier at ieee.org
Mon May 20 05:22:10 CEST 2019
On Mon, May 20, 2019 at 1:48 AM Éger Ferenc <eegerferenc at gmail.com> wrote:
> Hello All,
> As we discussed in the last mumble session, here is some status on the analog toolchain I intend to use for the 555. First, some note on the general approach: Many of the tools here are typical Unix-style (invoked in terminal, file goes in, file comes out). This is good from an integration and modularity perspective, and it is a tempting thought to strip all "unnecessary" intermediate steps (gnetlist, gspiceui) and write the SPICE deck and invoke tools manually (as suggested). However, I think this shall be a last resort in case when everything else goes FUBAR, because of two things: first, manual processing is error-prone and we need to really firm regarding what we layout is what we simulate (it is easy to just forget or mistype something and then overlook it) and second, if someone sees in the repo that doing a single .OP requires 6-10 hand-crafted terminal commands (not to mention parameter sweeps or monte carlo), it may be a huge deterrent in adoption (engineers are humans too, and humans in general love the convenience of a big green button).
In terms of establishing a proper design flow, I agree with you.
The aspect of libre-silicon even more important than a workable EDA
design flow may be to get a proof-of-concept circuit on actual silicon
as soon as possible, so that David et al. don't lose access to a
In this case, we analog IC design guys should focus on giving the
foundry alchemists a layout that has a chance to be functional by any
means, without relying on EDA tools and simulations based on device
models that aren't verified, and will remain impossible to get
verified without some sort of established IC fabrication flow.
What kind of circuit layout would make a difference for David et al.
within the next two weeks?
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