[Libre-silicon-devel] Analog design toolchain for 555

[Éger Ferenc]

Hello Everyone,

The librarian tool (auto-generation of static magic library from spice
netlist) is out. Please check if it is useable.

Regards,
Ferenc


On Sat, May 25, 2019 at 3:52 PM Hagen SANKOWSKI <hsank at posteo.de> wrote:

> Hello List!
>
> I updated both Versions, from Rigtho and Wikimedia as Sources, also. Now
> all three 555 schematics are able to run inside a hierarchical Spice
> Environment, controlled by the Makefile.
>
> Please take a look at https://github.com/libresilicon/cmos-555
>
> and give your feedback.
>
> The announced Howto, as I figured it out, I wrote down here
>
>
> https://vcs.in-berlin.de/chipforge_stdcelllib/wiki?name=Howto_Hierarchical-gEDA_Spice
>
> for further usage. Well, I'll need it for the Standard Cells as well.
>
> @tatzelbrumm, @ferenc:
> What else (beside the correct Spice Model from the PearlRiver) we need
> to do the dimensions? Last Sunday we talked about upscaling the MOSFET
> Width (W) regarding the new Length of 1 Micron instead 0.5 Micron, but
> thats all, isn't it?
>
> Regards,
> Hagen.
>
> On 5/25/19 12:57 AM, Hagen SANKOWSKI wrote:
> > Hello Everybody!
> >
> > Good news for the 555 also.
> > Today I got the Spice Simulation set right.
> >
> > All changes are checked in for the 555_Book-Version.sch, all other
> > Versions I still have to fix.
> >
> > Just look at the
> >
> >> make sim
> >
> > target in the GNUmakefile. And yes, the Use-Case example still misses
> > the right functionality.
> >
> > A short howto about how to got the simulation in Spice, which attributes
> > in the Schematics I add (and which removed) will follow soon.. Well,
> > first I have to sleep some hours :-)
> >
> > Regards,
> > Hagen.
> > _______________________________________________
> > Libre-silicon-devel mailing list
> > Libre-silicon-devel at list.libresilicon.com
> > http://list.libresilicon.com/mailman/listinfo/libre-silicon-devel
> >
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