Hello List!
Today on our weekly Mumble session we talked about the "triple-5" once more. So I got itchy fingers and set up my personal repository for that on github (https://github.com/chipforge/CMOS-555).
Well, no repository without content - please check the README file and see the Schematic I already draw now. For everybody which is lazy to install Lepton-EDA (as describted in the README) I attached a fency screenshot.
Please check the Schematic, based on the Wikimedia SVG drawing, for mistakes I did. All dimensions for the transistors (Width, Length) and the restistors (Resistance) are still just generic. This task I suppose will do someone of you which is more an analog guy than me :-)
BTW, Tatzelbrumm and Ference, do you like to clone the repository and we're merging each other? Or, otherwise I can shift the repository to the github.com/libresilicon group and we are working there. What do you prefer?
Best Regards, Hagen.
P.S.: Other versions of the CMOS "555" circuit I saw, will follow soon as schematics - one e.g. even has on BJT.
Hello,
Sehr schön. Looks very good for starting point. A little remark: I think the M6-M7-R1 complex will need to be replaced to a constant-gm reference (otherwise the bias current will be highly supply-dependent). Also, "syntax error" near M1-M5 (floating gate).
I would recommend that we move the repo under libresilicon (it is easier for others (newcomers) to find there, there is already a sort of chaos from repos distributed under multiple users). I will clone a "work copy" for myself and have the changes pulled when ready (as done while working on pearlriver, to reduce merge conflicts).
Regrds, Ferenc
On Mon, Apr 29, 2019 at 2:17 AM Hagen SANKOWSKI hsank@posteo.de wrote:
Hello List!
Today on our weekly Mumble session we talked about the "triple-5" once more. So I got itchy fingers and set up my personal repository for that on github (https://github.com/chipforge/CMOS-555).
Well, no repository without content - please check the README file and see the Schematic I already draw now. For everybody which is lazy to install Lepton-EDA (as describted in the README) I attached a fency screenshot.
Please check the Schematic, based on the Wikimedia SVG drawing, for mistakes I did. All dimensions for the transistors (Width, Length) and the restistors (Resistance) are still just generic. This task I suppose will do someone of you which is more an analog guy than me :-)
BTW, Tatzelbrumm and Ference, do you like to clone the repository and we're merging each other? Or, otherwise I can shift the repository to the github.com/libresilicon group and we are working there. What do you prefer?
Best Regards, Hagen.
P.S.: Other versions of the CMOS "555" circuit I saw, will follow soon as schematics - one e.g. even has on BJT. -- "They who can give up essential liberty to obtain a little temporary safety, deserve neither liberty nor safety." Benjamin Franklin (1775)_______________________________________________ Libre-silicon-devel mailing list Libre-silicon-devel@list.libresilicon.com http://list.libresilicon.com/mailman/listinfo/libre-silicon-devel
Hello Ference!
On 4/29/19 8:26 PM, Éger Ferenc wrote:
Sehr schön. Looks very good for starting point. A little remark: I think the M6-M7-R1 complex will need to be replaced to a constant-gm reference (otherwise the bias current will be highly supply-dependent). Also, "syntax error" near M1-M5 (floating gate).
I already fixed the floating gate issue - thanks for eye-balling :-)
The whole schematic I took from Wikimedia (the link is already in the Schematic Title Block), including the M6-M7-R1.
As I mentioned, I did some investigations and found slightly different versions. This Wikimedia Version has the 4th Resister R1 as a property.
I'll draw all other versions also, which I found. One has a addtional diode eg. I think we should collect all version first and than discuss and find the best one for us, which we implement.
I would recommend that we move the repo under libresilicon (it is easier for others (newcomers) to find there, there is already a sort of chaos from repos distributed under multiple users).
Done. Now on https://github.com/libresilicon/CMOS-555
BTW, I am curios about this Video from the EEVblog (https://www.youtube.com/watch?v=XZ4r8Rc5aus) - he claims (not) to found a Easter Egg in the 555. It is at least a very strange behavior. I am not sure, whether the 55.5 Hz modulation on 55.5k Hz is a fake or not. Well, it was published on March 31, one day before April fools day..
What do you think about that??? engineer's joke - or, did someone has some original 555 for bread-board evaluation?
Regards, Hagen.
On Mon, Apr 29, 2019 at 2:17 AM Hagen SANKOWSKI <hsank@posteo.de mailto:hsank@posteo.de> wrote:
Hello List! Today on our weekly Mumble session we talked about the "triple-5" once more. So I got itchy fingers and set up my personal repository for that on github (https://github.com/chipforge/CMOS-555). Well, no repository without content - please check the README file and see the Schematic I already draw now. For everybody which is lazy to install Lepton-EDA (as describted in the README) I attached a fency screenshot. Please check the Schematic, based on the Wikimedia SVG drawing, for mistakes I did. All dimensions for the transistors (Width, Length) and the restistors (Resistance) are still just generic. This task I suppose will do someone of you which is more an analog guy than me :-) BTW, Tatzelbrumm and Ference, do you like to clone the repository and we're merging each other? Or, otherwise I can shift the repository to the github.com/libresilicon <http://github.com/libresilicon> group and we are working there. What do you prefer? Best Regards, Hagen. P.S.: Other versions of the CMOS "555" circuit I saw, will follow soon as schematics - one e.g. even has on BJT. -- "They who can give up essential liberty to obtain a little temporary safety, deserve neither liberty nor safety." Benjamin Franklin (1775)_______________________________________________ Libre-silicon-devel mailing list Libre-silicon-devel@list.libresilicon.com <mailto:Libre-silicon-devel@list.libresilicon.com> http://list.libresilicon.com/mailman/listinfo/libre-silicon-devel
Hello List!
I just add two more versions of the 555 schematic to the github.com/libresilicon/CMOS-555 repository.
One is based on reversed-engineers work, published on righto.com; I took the same number scheme for the circuits.
Another is from the already mentioned Book "Designing Analog Chips" from Hans Camenzind, the original author of the 555. On page 148 he shows a schematic for a 5V CMOS version. Well, this schematic is literally similar to the Wikimedia Version. I called this the "Book Version" and took also Hans number scheme (and dimensions!).
So, here we got an issue. The Version showed by Hans is for 5 Volt he wrote. And, this version uses a feature size of 0.5 Microns on some MOSFETs which is smaller than our 1 micron technology. I think, we have to scale-up the dimensions for two reasons.
1. We do not get the right values from PearlRiver to calculate beta right; 1 micron for L and 1.5 for W is the minimum we can measure on PearlRiver.
2. The version is aimed for 5 Volt. If we like to run with higher supply voltage for reasons, we have to enforce the gate length.
@Tatzelbrumm, @Ference, what do you think about that??
Regards, Hagen Sankowski
P.S.: The
At the moment, I'm happy that I can open the schematic with standard geda from my old ubuntu distribution. I'm wondering if the 7555 uses actual resistors instead of mosfets, and if the 7555 uses resistors, what their actual values are.
tatzelbrumm
On Thu, May 2, 2019 at 1:55 PM Hagen SANKOWSKI hsank@posteo.de wrote:
Hello List!
I just add two more versions of the 555 schematic to the github.com/libresilicon/CMOS-555 repository.
One is based on reversed-engineers work, published on righto.com; I took the same number scheme for the circuits.
Another is from the already mentioned Book "Designing Analog Chips" from Hans Camenzind, the original author of the 555. On page 148 he shows a schematic for a 5V CMOS version. Well, this schematic is literally similar to the Wikimedia Version. I called this the "Book Version" and took also Hans number scheme (and dimensions!).
So, here we got an issue. The Version showed by Hans is for 5 Volt he wrote. And, this version uses a feature size of 0.5 Microns on some MOSFETs which is smaller than our 1 micron technology. I think, we have to scale-up the dimensions for two reasons.
- We do not get the right values from PearlRiver to calculate beta
right; 1 micron for L and 1.5 for W is the minimum we can measure on PearlRiver.
- The version is aimed for 5 Volt. If we like to run with higher supply
voltage for reasons, we have to enforce the gate length.
@Tatzelbrumm, @Ference, what do you think about that??
Regards, Hagen Sankowski
P.S.: The _______________________________________________ Libre-silicon-devel mailing list Libre-silicon-devel@list.libresilicon.com http://list.libresilicon.com/mailman/listinfo/libre-silicon-devel
Hi all scale it up. I would make it bigger, lets say 4 micron as the circuit is more reliable with bigger transistors, so it survives misuse to a higher degree and as the 555 is not so complicated one could use more chip area. It would be good to be at least compatible with 4000 cmos logic which works upto 20v. If the 555 survives 30v it wkuld be an interesting feature. Also have big output transistors so one can directly drive a big mosfet with a big gate capacity. So one can do pwm with a mosfet and our 555 to control dc motors or to build simple switchmode power supplies.
Cheers Ludwig
On Thursday, May 2, 2019, Hagen SANKOWSKI hsank@posteo.de wrote:
Hello List!
I just add two more versions of the 555 schematic to the github.com/libresilicon/CMOS-555 repository.
One is based on reversed-engineers work, published on righto.com; I took the same number scheme for the circuits.
Another is from the already mentioned Book "Designing Analog Chips" from Hans Camenzind, the original author of the 555. On page 148 he shows a schematic for a 5V CMOS version. Well, this schematic is literally similar to the Wikimedia Version. I called this the "Book Version" and took also Hans number scheme (and dimensions!).
So, here we got an issue. The Version showed by Hans is for 5 Volt he wrote. And, this version uses a feature size of 0.5 Microns on some MOSFETs which is smaller than our 1 micron technology. I think, we have to scale-up the dimensions for two reasons.
- We do not get the right values from PearlRiver to calculate beta
right; 1 micron for L and 1.5 for W is the minimum we can measure on PearlRiver.
- The version is aimed for 5 Volt. If we like to run with higher supply
voltage for reasons, we have to enforce the gate length.
@Tatzelbrumm, @Ference, what do you think about that??
Regards, Hagen Sankowski
P.S.: The
Hi Our gate oxide is 40nm thick which means that the break through happens at around 40V DC from gate to bulk. Then of course there is the issue with the depletion zone and latch up effects.
I've increased the trench depth to 3.5 microns and we have virtually no Ld and a very shallow doping which means that Cj (junction capacity) is really low and the channel length is basically equal to the gate with (1 micron).
In general that means, that the isolation properties from Drain to Source (and Bulk for what it's worth) are even better than 40V probably.
We'll see on Monday, hopefully.
Anyway... The target for the absolute maximum ratings are 40V.
I've taken standard models from other manufacturers and have put the parameters for which I've dimensioned our geometry.
And at least SPICE told me, the magic smoke won't come out.
Now that we have spacers, I can finally check on Monday, whether I've done my homework correctly.
Cheers -lev
On Friday, 3 May 2019 12:47:38 PM HKT ludwig jaffe wrote:
Hi all scale it up. I would make it bigger, lets say 4 micron as the circuit is more reliable with bigger transistors, so it survives misuse to a higher degree and as the 555 is not so complicated one could use more chip area. It would be good to be at least compatible with 4000 cmos logic which works upto 20v. If the 555 survives 30v it wkuld be an interesting feature. Also have big output transistors so one can directly drive a big mosfet with a big gate capacity. So one can do pwm with a mosfet and our 555 to control dc motors or to build simple switchmode power supplies.
libresilicon-developers@list.libresilicon.com
-
Christoph Maier -
David Lanzendörfer -
Hagen SANKOWSKI -
ludwig jaffe -
Éger Ferenc