Hi Everyone, Please check the contacts and METAL1 at the SONOS cells. It seems to me that the metal track ends before reaching the contact. Regards, Ferenc On Fri, Nov 2, 2018 at 3:48 PM ludwig jaffe <ludwig.jaffe@gmail.com> wrote:

Cool!

On Friday, November 2, 2018, David Lanzendörfer < david.lanzendoerfer@o2s.ch> wrote:

...

Hi everyone So Ferec has implemented the LDMOS power fet test structures and Hagen is right now layouting the well test structures. As soon as he's done I'd suggest to do a last walk through, through the GDS2 files and then ordering the mask set.

Cheers David

-- Send from mobile phone with autocorrection / autofill. Blame my phone for typos.

_______________________________________________ Libre-silicon-devel mailing list Libre-silicon-devel@list.libresilicon.com http://list.libresilicon.com/mailman/listinfo/libre-silicon-devel

Hello All, Checked, OK. Regards, Ferenc On Sat, Nov 3, 2018 at 4:26 PM David Lanzendörfer < david.lanzendoerfer@o2s.ch> wrote:

Dear Ferenc Thanks sooo much for this hint! It was a cifoutput rule problem I now fixed it globaly and pushed the changes to scmos.tech to GitHub. Please feel free to verify the output with my changes.

Cheers David

On Saturday, 3 November 2018 12:43:34 AM HKT Éger Ferenc wrote:

...

Hi Everyone,

Please check the contacts and METAL1 at the SONOS cells. It seems to me that the metal track ends before reaching the contact.

Regards, Ferenc