July 2021 - Libresilicon-developers

TSMC
by David Lanzendörfer 26 Sep '21

26 Sep '21

So I wrote today to Kees Joosse from TSMC[1] and asked him whether they would accept an order from us sending them just the GDS2 files generated with the openly available design rules here[2]. I'll tell you IF I ever hear back from him... haha [1] https://www.linkedin.com/in/keesjoosse [2] https://git.libresilicon.com/?p=redmine/qtflow.git;a=blob_plain;f=tech/osu0… -- (\__/) (='.'=) This is Ninja Bunny. (")_(") Copy and paste Bunny into your signature to help him gain world domination

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Announcement - Mumble session on Sunday 2021-08-01 @ 18:00 UTC
by Hagen SANKOWSKI 01 Aug '21

01 Aug '21

Hello List! This is our weekly announcement for the next Mumble Sessions on Sunday 2021-08-01 @ 18:00 UTC. Please join us as usual at our Mumble Server murmur.libresilicon.com at Port 64738, the Channel is IC. We like to follow-up our topics from mumble sessions before. Regards, Hagen.

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Announcement - Mumble session on Sunday 2021-07-18 @ 18:00 UTC
by Hagen SANKOWSKI 24 Jul '21

24 Jul '21

Hello List! This is our weekly announcement for the next Mumble Sessions on Sunday 2021-07-18 @ 18:00 UTC. Please join us as usual at our Mumble Server murmur.libresilicon.com at Port 64738, the Channel is IC. We like to follow-up our topics from mumble sessions before. Regards, Hagen.

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Re: [Libre-silicon-devel] Announcement - Mumble session on Sunday 2021-07-18 @ 18:00 UTC
by David Lanzendörfer 20 Jul '21

20 Jul '21

Someone successfully hooked up an Atmega MCU without differential gates (and so) to a DDR interface and got the DRAM chip to do something useful. You can also just use two IO pins instead of a differential gate, you just have to keep the transfer rates low enough, then you don't even need to tinker around with pull up and pull down resistors for compensating for the I/O pad resistance :-) Cheers -lev On Tuesday, July 20, 2021 9:18:35 AM WEST Hagen SANKOWSKI wrote: > Hello David. > > Long time ago, I had to connect an Altera FPGA with a DDR2 RAM. > It was a mess, do to an on-chip bug :-( > > BTW, as I still remember, at least a couple of signals are differential, > eg. Clock (CKx) and Data Select (DQSx), and needing balanced routing.. > > Sorry. > Hagen. > --- > "They who can give up essential liberty to obtain a little temporary > safety, deserve neither liberty nor safety." Benjamin Franklin (1775) > > Am 19.07.2021 16:06 schrieb David Lanzendörfer: > > DRAM DDR3 without leveling IS an option. > > We don't need special pads and can just use the I/O pads :-) > > > > https://www.intel.com/content/dam/altera-www/global/ja_JP/pdfs/literature/ > > an/ an520.pdf > > > > There we go! =^_^=~~~~~ > > > > On Sunday, July 18, 2021 8:51:41 PM WEST Hagen SANKOWSKI wrote: > >> Meeting Minutes of the Mumble session today > >> =========================================== > >> > >> Participants: Devon, tatzelbrumm (partly), hsank, leviathan > >> > >> > >> Topics > >> ------ > >> > >> - (external) RAM > >> > >> While thinking about an RISC-V CPU demonstrator, we need memory for > >> loading an Operating System like Linux. > >> > >> Our first guess was for the demonstrator just to use external RAM > >> chips, > >> e.g. with HyperRAM, which has a quite simple interface and can be > >> driven > >> without LVDS-IO-Pads (which are still not available for us). > >> Unfortunately using a couple of them gets fast quite expansive. > >> > >> Using commercial available (and cheaper) DRAM nowadays is out of reach > >> for us - this chips using a proprietary interface called DDR2 or DDR3. > >> This interface needs differential IO-Pads (the LVDS we already > >> mentioned > >> above) and is critical about timing (in the meaning of different wire > >> length, wire resistance and so on). > >> > >> Without a PDK for a technology we can not design the analog stuff > >> inside > >> 'cause we still miss all the concrete values for the layers to > >> calculate > >> transistor and wire sizes. > >> > >> - alternative: internal hand-crafted RAM-cells > >> > >> Designing internal RAM cells, no matter whether dynamic RAM or static > >> RAM isn't possible without the analog values from the PDK.. > >> > >> - possible pathes to go > >> > >> * Reducing the Operating System to smaller memory footprints (e.g. > >> with > >> NetBSD) and soldering a reasonable amount of HyperRAM close to the CPU > >> > >> * Getting a PDK and design with a couple of iterations in silicon our > >> analog stuff (LVDS-IO-Pads or RAM-cells hand-crafted) 'till it works.. > >> > >> '''' > >> Note: if we'd start with an alien PDK we had to re-design the analog > >> stuff from ground up again for our LibreSilicon PDK again.. > >> '''' > >> > >> If you have some suggestions how to get out of our > >> chicken-and-egg-Problem, please drop us an email :-) > >> > >> > >> Regards, > >> Hagen > >> _______________________________________________ > >> Libresilicon-developers mailing list > >> Libresilicon-developers(a)list.libresilicon.com > >> https://list.libresilicon.com/mailman/listinfo/libresilicon-developersH -- (\__/) (='.'=) This is Ninja Bunny. (")_(") Copy and paste Bunny into your signature to help him gain world domination

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Fwd: Announcement - Mumble session on Sunday 2021-07-18 @ 18:00 UTC
by Christoph Maier 17 Jul '21

17 Jul '21

Oops, forgot to forward to the group. In all fairness to the neuromorphs, they kept one more slide in the deck, but they moved it all the way to the end and didn't present it. https://docs.google.com/presentation/d/1El7U_EbFTuB5D5w-drW5fdWDpSrf05OthE9… tatzelbrumm ---------- Forwarded message --------- From: Christoph Maier <christoph.maier(a)ieee.org> Date: Sat, Jul 17, 2021 at 5:20 PM Subject: Re: [Libre-silicon-devel] Announcement - Mumble session on Sunday 2021-07-18 @ 18:00 UTC To: Hagen SANKOWSKI <hsank(a)posteo.de> Now that the Telluride Neuromorphic Workshop is over, where I just played with my Märklin train on the public record: https://youtu.be/3X-5Q-h6qjY?t=6502 I need to pay attention to what you're doing again ... in particular how far you are with getting skywater-pdk to work. What I did for the Telluride crowd wasn't considered very presentable. Of the stuff I did: https://github.com/MastellaM/sky130_TAC3/pull/3 only one slide made it into The Final Presentation: https://youtu.be/3X-5Q-h6qjY?t=2207 , and it was considered somewhat out of place. tatzelbrumm On Sat, Jul 17, 2021 at 12:49 PM Hagen SANKOWSKI <hsank(a)posteo.de> wrote: > > Hello List! > > This is our weekly announcement for the next Mumble Sessions on Sunday > > 2021-07-18 @ 18:00 UTC. > > Please join us as usual at our Mumble Server murmur.libresilicon.com at > Port 64738, the Channel is IC. > > We like to follow-up our topics from mumble sessions before. > > Regards, > Hagen. > _______________________________________________ > Libresilicon-developers mailing list > Libresilicon-developers(a)list.libresilicon.com > https://list.libresilicon.com/mailman/listinfo/libresilicon-developers

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Announcement - Mumble session on Sunday 2021-07-11 @ 18:00 UTC
by Hagen SANKOWSKI 15 Jul '21

15 Jul '21

Hello List! This is our weekly announcement for the next Mumble Sessions on Sunday 2021-07-11 @ 18:00 UTC. Please join us as usual at our Mumble Server murmur.libresilicon.com at Port 64738, the Channel is IC. We like to follow-up our topics from mumble sessions before. Regards, Hagen.

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Affordable RISC-V chips
by David Lanzendörfer 05 Jul '21

05 Jul '21

Hi list I came across this article here and I'm going to buy some chips to develop some hardware prototypes. I was thinking about testing energy and speed on a devboard and then think about consumer products I could build with it, like a laptop or a tablet. I was wondering whether someone of you wants to join as well. https://www.cnx-software.com/2021/07/05/xiangshan-open-source-64-bit-risc-v… Cheers -lev -- (\__/) (='.'=) This is Ninja Bunny. (")_(") Copy and paste Bunny into your signature to help him gain world domination

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Announcement - Mumble session on Sunday 2021-07-04 @ 18:00 UTC
by Hagen SANKOWSKI 03 Jul '21

03 Jul '21

Hello List! This is our weekly announcement for the next Mumble Sessions on Sunday 2021-07-04 @ 18:00 UTC. Please join us as usual at our Mumble Server murmur.libresilicon.com at Port 64738, the Channel is IC. We like to follow-up our topics from mumble sessions before. Regards, Hagen.

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Libresilicon-developers July 2021