26 Nov
2018
26 Nov
'18
12:11 p.m.
--- crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
On Mon, Nov 26, 2018 at 11:53 AM David Lanzendörfer david.lanzendoerfer@o2s.ch wrote:
Oh. Okey. Well. Andreas is working on something similar: https://murmur.libresilicon.com/lsc/rocket-chip-yosys
neat!
Also, yeah, making a schematics out of verilog is a bit tricky, because you've gotta place the parts from the graph in the schematics and draw the wires without it becoming a total mess.
well, the point is: if it's a mess, that's indicative that the subdivisions and data connections in the verilog file are not good enough. it means, "break file down into smaller modules" and "Get S*** Together" :)
But when graphviz is satisfying anyway, I'm happy :-)
:)
l.