Hi Staf Ok. That was, what I had asked TSMC among other things in my email, so thanks for answering this question. I don't really care who and how. All I wanna do is generate a layout, which I place and route and revision control on my public Git repository and I want a foundry which tapes it out.
BTW: I did see that IMEC now works with you without even bothering to come back to me concerning my question whether it would be possible to at least give us access to some design rules, so that we can generate standard cells with them. If you could get us some design rules for IMEC, we could start generating standard cells and synthesize some test chips for this process... THAT would be interesting.
Cheers -lev
On Wednesday, July 21, 2021 10:25:29 AM WEST Staf Verhaegen (FibraServi) wrote:
Op 21/07/2021 om 00:52 schreef David Lanzendörfer:
So I wrote today to Kees Joosse from TSMC[1] and asked him whether they would accept an order from us sending them just the GDS2 files generated with the openly available design rules here[2]. I'll tell you IF I ever hear back from him... haha
MOSIS SCMOS design rules use other GDS2 layer numbering than TSMC so your gds2 will not be able to be manufactured by TSMC. It will also need other post processing before you will actually have a DRC compliant GDS2.
I am considering supporting SCMOS compliant design with Chips4Makers though and process them in TSMC.
greets, Staf.