Hi all,
thats very good news, so no need for dlp (mems mirrors) and mechanics.
" Technical problems to be solved with this arrangement are:
a) The imaging unit is expected to generate considerable amount of heat (6.25cm2 with 1300mW/cm2 intensity output and 2.7% WPE is approx. 300W power consumption, most of which is dissipated), resulting in considerable thermal expansion, that needs to be managed (cooling, or using low-LCTE materials).
b) Power supply and data connections need to be implemented without jeopardizing mechanical compatibility.
6. Conclusion and open points
The use of JBD's AMuLED display as maskless lithography pattern source is not infeasible outright.
Points to be further evaluated:
- Effect of incoherent illumination on projection optics
- Evaluation on JBD side if they want to develop a 2.5x2.5cm unit for us...
- ... and How Much Does It Cost?
- Defect density - mitigation or enhancement
- Feasiblity analysis of the proposed integration on INL/LS side
- Thermal management and electrical connection
"
CHIPCOOLER:
Here I would like to suggest to add a aluminium or copper plate to the backside of the display-chip. The plate has small etched trenches, and is covered by another plate without trenches. Both plates are glued together or friction welded together in a way plate heat exchangers are manufactured.
Pressurized water/salt mixture at -10C is pumped through the trenches to cool the chip in order to reduce expansion. A compressor based freezer cools the liquid and a high pressure pump (gear pump) will provide for a continuous flow without high pressure variations which would cause inaccuracy. Also the pump driven by a strong stepper motor can be modulated to run only in times when the display is switched off, so you get a duty cycle of operation and cooling. The mass of the coolant and the metal can absorb heat pulses.
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Cheers,
Ludwig
On 9/14/20, David Lanzendörfer leviathan@libresilicon.com wrote:
Hi folks So on Wednesday, 10 am Portuguese time, I'm having a ZOOM conference with the other folks of the Photonics lab at INL, where I'll be showing a presentation I'm right now tinkering together. The goal is to use LibreSilicon in combination with their Integrated Photonics, in order to build neuromorphic chips. By becoming part of Jana's research project (she's a professor for photonics
at INL), she and I can make LibreSilicon part of the university projects which would make it subject to direct EU funding. Just a heads up.
Cheers -lev