Meeting Minutes of the Mumble session today =========================================== Participants: Devon, tatzelbrumm (partly), hsank, leviathan Topics ------ - (external) RAM While thinking about an RISC-V CPU demonstrator, we need memory for loading an Operating System like Linux. Our first guess was for the demonstrator just to use external RAM chips, e.g. with HyperRAM, which has a quite simple interface and can be driven without LVDS-IO-Pads (which are still not available for us). Unfortunately using a couple of them gets fast quite expansive. Using commercial available (and cheaper) DRAM nowadays is out of reach for us - this chips using a proprietary interface called DDR2 or DDR3. This interface needs differential IO-Pads (the LVDS we already mentioned above) and is critical about timing (in the meaning of different wire length, wire resistance and so on). Without a PDK for a technology we can not design the analog stuff inside 'cause we still miss all the concrete values for the layers to calculate transistor and wire sizes. - alternative: internal hand-crafted RAM-cells Designing internal RAM cells, no matter whether dynamic RAM or static RAM isn't possible without the analog values from the PDK.. - possible pathes to go * Reducing the Operating System to smaller memory footprints (e.g. with NetBSD) and soldering a reasonable amount of HyperRAM close to the CPU * Getting a PDK and design with a couple of iterations in silicon our analog stuff (LVDS-IO-Pads or RAM-cells hand-crafted) 'till it works.. '''' Note: if we'd start with an alien PDK we had to re-design the analog stuff from ground up again for our LibreSilicon PDK again.. '''' If you have some suggestions how to get out of our chicken-and-egg-Problem, please drop us an email :-) Regards, Hagen