Hi The progress in the lab is slowed down by machines, which already have been booked and yesterday, it took me half an hour until someone told me, that the cooler for the Poly dry etcher wasn't broken, but the pump just turned off from now on, when not being in use, because I'm essentially the only person etching polysilicon, because no one else works on a CMOS process at NFF... ^^'
Anyway. I'm now so far, that we've got the new poly gates on a STI isolated surface: https://twitter.com/LibreSilicon/status/1126815745734692864
On Monday it's Buddhas birthday, so the lab is closed... again... Hong Kong. Those folks have so many holidays... If I wouldn't be here already, I'd be jealous =^_^=~~
Tuesday I'll attend the formal training for the Cirie200 (nickel dry etch machine), as well as finalize implant stop, nimplant, pimplant, annealing, nitride spacers + silicide block, and then I put it into the furnace for LTO deposition.
After LTO, I can etch the contact holes and sputter Nickel+Aluminum+Nickel.
Now that I anyway have to sputter and dry etch Nickel, I decided, that I use Nickel instead of Titanium for the interface layers. This will reduce the via resistance by a factor 10.
Cheers David