On Mon, Jul 9, 2018 at 6:07 PM, David Lanzendörfer david.lanzendoerfer@o2s.ch wrote:
Tile-Link/Chip-Link[3] [4] doesn't seem to have been patented yet and seems to come from universities and the like.
tilelink has the disadvantage that it was designed by people who think in high-level languages. i don't believe they ever actually looked really closely at the auto-generated verilog and thought, "if this standard became popular and people tried to implement it from scratch in verilog or VHDL, how much effort would they need to expend?"
consequently it's hell to implement in anything other than an OO-based HDL. IIT Madras, who are using Bluespec, are having well-above-average difficulties implementing it.
[1] https://patents.google.com/patent/US7069376B2 [2] https://patents.google.com/patent/US20050138253
fun as it would be to get into a pissing contest with ARM and have all the claims invalidated by crowd-sourced prior art searches like cloudfare did against that patent troll last year, we have better things to do with our time.
l.