On Wed, Jun 27, 2018 at 5:23 AM, Ludwig Jaffe ludwig.jaffe@gmail.com wrote:
Hi people,
Pinmuxes are dangerous, because they sometimes mux the wrong thing like having 2 differential pins one could choose between usb or sata. If one wants both?!
that's precisely why i am not muxing USB or SATA. SATA because they require specialist IO pads with voltage reference levels way WAY different from standard GPIO.
the only high-speed differential pairs i've ever seen muxed successfully on commercial SoCs were for LVDS, which is output-only. i haven't checked the pinmux of recent SoCs in detail such as the RK3288 and RK3399, they *may* have successfully... no: http://opensource.rock-chips.com/images/4/4e/Rockchip_RK3288_Datasheet_V2.2-...
the RK3288 places MIPI, HDMI and eDP all onto individual pins. *all of these are analog* and completely different voltages and current from digital GPIO.
basically a pinmux is good for low-speed *digital* signals up to around 200mhz, possibly 300mhz if you're really lucky.
Many SOCs I encountered work like this.
then they are bloody stupid and were asking for trouble, and i would expect all of them to 100% fail.
SATA is 6 gigabits per second differential-pairs, the voltages are 2.5 VREF with a swing around 1.25v, i don't know the exact HI/LO amounts.
USB2 requires a 1.5kOhm dynamically-switched resistor which would also need to be dynamically muxed in. switching that in would also be bloody stupid.
Such pain should be avoided. A pinmux needs proper planing.
yes it does. that is why i have studied over a hundred different commercially-successful SoCs and ECs, for over ten years.
Go for a large package with a good socket and have not too much need to mux,
sorry, to have to ask, but did you read the references that i gave, or look at what i wrote? in case you missed it here is the PDF again: http://hands.com/~lkcl/pinmux_chennai_2018.pdf
as outlined in the very first main slide (p4), i point out that the consequences of following that strategy is to end up with a 1200-pin chip that will have significant cost and reduced yields. the gold wire-bonding process would need to smash a wire onto the die 2,400 times. each time the wire bonding machine is smashed onto the chip it creates hair-line cracks in the die.
also you cannot fit a 1,200 pin chip of size 40mm x 40mm onto a PCB of size 38 x 50mm.
I would suggest to use old Intel sockets as the ZIF-Sockets are in the wild and the package manufacturers also produce them.
the socket alone will cost about the same or possibly even more than the SoC, even in mass-volume quantities.
i'm developing a $3 to $4 15x15mm 3W SoC, ludwig, not a $500 intel 150W completely impractical billion-transistor chip with a sale price of over $500.
l.