Hi I've now started wiring a RISC-V CPU generated with Rocket-Chip into a top level: https://github.com/leviathanch/SauMauPing1 However, for some reason it doesn't start trying to fetch instructions. I'll investigate tomorrow, for now I expect it to rain cats and dogs tonight and tomorrow as much as my head hurts right now. I'll relax now and get back tomorrow with lots of coffee.
Another important topic which came up when I tried to repurpose the memory controller from the North Point project: We will have to develop SRAM for our MCU or solder an external SRAM chip onto the board... like this one: https://github.com/freecores/zbt_sram_controller/blob/master/ZBTSRAM61NLP_NV...
Didn't we have a talk some while ago with one of the folks from OpenRAM? That's exactly their department. We should tell them to be ready to get started dimensioning SRAM cells, as soon as we've got the first workable results from PearlRiver.
Cheers David
PS: Turned spell checker off now ^^