Hi
This is one of the key lessons that I learned from reverse engineering. Do NOT be tempted to innovate or deviate IN ANY WAY until the task is completed.
It sounds boring, you want to do something new, be the innovator! but is incredibly important NOT to do so.
Now you know why I recommended the 6502 not say the 6510, because the full lithographic masks of the 6502 have been rev/engd and the netlist created, to the point where there is now an online OPERATIONAL javascript 6502 simulator.
Hagen's suggestion of doing the IO ASIC, just as goid, because the verilog source is available.
Oh. We went into the R&D with a clear plan on the overall order of steps and a basic procedure, derived from older 1um processes and lots of literature.
Then, in the lab, some chemical reactions (mainly silicide formation) did not work as expected, so we had to go back to the drawing board and figure silicide and interconnet with silicide out.
In overall, I've got a very good idea on what I'm doing and where I'm standing.
The problem is more, that we need to make sure, that we can actually produce products with the process, I'm basically done figuring out now.
... Well. At least the NMOS/PMOS have no more issues left, which would stop it from switching next week, so it would really surprise me, if this still wouldn't work...
The implications of an open node are so big, that it's unacceptable not to finish.
We're in a marathon, and I can finally see the finish line, would be shit to quit on the last few meters...
-lev