Hi The thing is that I wanna reduce the amount of proprietary IP on the PCB. I also considered the solution of making a simple converter, which basically contains only a DDR3/4 controller as well as a HyperRAM interface, but considering the overhead, it might actually be more practical to just try to use the DRAM over bit banging. It has been done already on FPGAs without specialized pads and it seems to be working, just without the maximum transfer rates. However, the solution over bitbanging probably is still the better solution IMHO, because it doesn't have the overhead of yet another component in between.
Cheers -lev
On Saturday, July 24, 2021 8:38:53 PM WEST Philipp Gühring wrote:
Hi,
What about "outsourcing" the memory controller over HyperRam? If we can do HyperRam, we could have a controller that translates HyperRam to DDR2/DDR3?
Our CPU <-> HyperRam <-> Controller <-> DDR2/3 <-> DRAM chips
Just an idea...
Best regards, Philipp Gühring _______________________________________________ Libresilicon-developers mailing list Libresilicon-developers@list.libresilicon.com https://list.libresilicon.com/mailman/listinfo/libresilicon-developers