Hey Hagen Could you please elaborate on that "we can work on any supply voltage we want internally" from yesterday in the mumble conference a little bit further? Maybe some circuit diagram in LaTeX and some explenatory text I can include in the dimensioning section would be fantastic!
Kind of like a small explenation how one could get 2 or 3 stacked transistors to operate with TTL and CMOS logic levels with out V_Tn~=0.8V and V_Tp~=-0.8V
Cheers David
That is already on my todo-list, because I am aware of the point as "has to be communicated to outsiders"
Stay tuned :-)
On 03/05/2018 08:40 AM, David Lanzendörfer wrote:
Hey Hagen Could you please elaborate on that "we can work on any supply voltage we want internally" from yesterday in the mumble conference a little bit further? Maybe some circuit diagram in LaTeX and some explenatory text I can include in the dimensioning section would be fantastic!
Kind of like a small explenation how one could get 2 or 3 stacked transistors to operate with TTL and CMOS logic levels with out V_Tn~=0.8V and V_Tp~=-0.8V
Cheers David
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