Hello List!
Just a small reminder for our next Mumble Sessions on this Sunday, 01/12/2019, at 21.00 Hong Kong Time.
Please join us as usual at our Mumble Server murmur.libresilicon.com at Port 64738, the Channel is IC.
Thanks for the attention!
Hello List!
Just a small reminder for our next Mumble Sessions on this Sunday, 24/11/2019, at 21.00 Hong Kong Time.
Please join us as usual at our Mumble Server murmur.libresilicon.com at Port 64738, the Channel is IC.
Thanks for the attention!
Hi all,
in case anybody is interested in this: I started working on a mask editor
that is similar in principle to Magic, but with a few notable differences:
- totally different, more "Paintbrush-like" approach to its user interface
- not build in C around a TCL interpreter, but written in Java and
extensible by writing Java code
- design is done using a "virtual" technology (in Magic terms) that is as
minimal as possible, hoping to derive the actual masks from this in a
mostly-automated way
Current results so far look promising. I was able to draw a NAND gate,
export it to Magic, export it from there to SPICE and simulate it as a
circuit.
Screenshots:
https://github.com/MartinGeisse/chipdraw/blob/master/resource/test/nand/des…
Code: https://github.com/MartinGeisse/chipdraw
I'm working on the DRC only now, so the NAND from above will likely have
some DRC violations I didn't notice.
Greetings,
Martin
>From https://en.wikipedia.org/wiki/Scheme_(programming_language):
"Scheme has a diverse user base due to its compactness and elegance,
but its minimalist philosophy has also caused wide divergence between
practical implementations, so much that the Scheme Steering Committee
calls it "the world's most unportable programming language" and "a
family of dialects" rather than a single language."
Any programming language is only as compact and elegant as its
installation procedure on different computers and operating systems.
Hello List!
Just a small reminder for our next Mumble Sessions on this Sunday, 17/11/2019, at 21.00 Hong Kong Time.
Please join us as usual at our Mumble Server murmur.libresilicon.com at Port 64738, the Channel is IC.
Thanks for the attention!
Hello List!
Just a small reminder for our next Mumble Sessions on this Sunday, 10/11/2019, at 21.00 Hong Kong Time.
Please join us as usual at our Mumble Server murmur.libresilicon.com at Port 64738, the Channel is IC.
Thanks for the attention!
Hello List!
While doing some homework regarding our PAD cells, I once again looked
into the MOSIC Design Rules for Scalable CMOS [0].
Out of Rule Set 10.x we get the mimimum grid for bonding pad areas with
102 micron.
So my question is here, do somebody has access to bonding machines and
their documentation and can provide the grid of bonding pad areas this
machines usually can handle?
Is this 95u/100u as I still remember? Or are this machines already in
the milli-inch-measured domain, e.g. 4 mil for 101.6u?
Curious,
Hagen.
[0] https://www.mosis.com/files/scmos/scmos.pdf
--
support LibreSilicon to get back into the Clean Room
https://www.gofundme.com/f/libresilicon-cleanroom-rent