Libresilicon-developers March 2018

libresilicon-developers@list.libresilicon.com

8 participants
24 discussions

Question: Production time vs. power efficiency
by David Lanzendörfer 05 Mar '18

05 Mar '18

Hi Should I diffuse the p-well instead of just ion implanting it? It will take another 12 hours, but the on-resistance would be much lower, which will give less losses in the device. Cheers David

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F.Y.I. https://vcs.in-berlin.de/chipforge_stdcelllib/index
by Hagen SANKOWSKI 05 Mar '18

05 Mar '18

Dear List Members. We (hopefully) all like to be Open Source. IMHO this also means to handle the background information why we doing what on that way. While developing the Standard Cell Library often I came across the issue, how to communicate the design decision I am always taking there. In case of the Standard Cell Library there are e.g. topics like: = Why the number of stacked transistors becomes an important issue? = Why all the Textbooks handle only a dozen Cells and we like to have much more? = Why IO-Cells are so underestimated? = What are alternatives? So, to handle all this questions I already set up a Fossil Repository [0] where I try to explain all this stuff. Please note the link in the subject line. And yes, there is still a lot of work to do. Do not be afraid of asking stupid questions regarding the Standard Cell Library here on the list - I'll to try to answer them and publish explanations on this Wiki pages. Regards, Hagen. [0] https://en.wikipedia.org/wiki/Fossil_(software)

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Supply voltages: Docu-Task for Hagen :-)
by David Lanzendörfer 05 Mar '18

05 Mar '18

Hey Hagen Could you please elaborate on that "we can work on any supply voltage we want internally" from yesterday in the mumble conference a little bit further? Maybe some circuit diagram in LaTeX and some explenatory text I can include in the dimensioning section would be fantastic! Kind of like a small explenation how one could get 2 or 3 stacked transistors to operate with TTL and CMOS logic levels with out V_Tn~=0.8V and V_Tp~=-0.8V Cheers David

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Re: [Libre-silicon-devel] Drive-in (diffusion) time
by David Lanzendörfer 03 Mar '18

03 Mar '18

Hi Shuyun > The p-well and the n-well will need around 12 hours of diffusion each. > How does the diffusion machine work? > Is there a timer after which the furnace will reduce the heat and slowly > cools the wafer down and then goes into standby until I take the wafer out? > If yes: > Do you think it is possible that I just come there in the evening, put the > wafer in and come back the next morning, taking it out? I've reduced the time for the p-well to 3 hours by reducing the depth of the well. Now I only have got the n-well left, which needs to be diffused for 12 hours. So still the question: Can I put the wafer into the diffusion chamber over night? Cheers David

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Libresilicon-developers March 2018